Practical Electronics/IC/4007

4007 Transistor-level Transistor Dual complementary pair and inverter 14 The 4007 integrated circuit contains three complementary enhancement-mode MOSFET pairs. One pair has connections to the drain terminals, one to the source terminals and the commoned drains (i.e. it is wired as an inverter) and one allows access to all source and drain connections. All pairs have the gate terminals commoned and available. The bulk connections are to the power rails (VDD for the p-channel devices and VSS for the n-channel devices). The meanings of the abbreviations on the diagrams to the right are: PinsFunctionsSP2, SP3 Source terminals of 2nd and 3rd p-channel MOSFETsDP1, DP2 Drain terminals of 1st and 2nd p-channel MOSFETsDN1, DN2 Drain terminals of 1st and 2nd n-channel MOSFETsSN2, SN3 Source terminals of 2nd and 3rd n-channel MOSFETsD3 Drain terminals (common) of 3rd p-channel and n-channel MOSFETsG1, G2, G3 Gate terminals of each MOSFET pair.