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360 Assembly/360 Instructions/ST
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ST - Store - Opcode 50 - RX format Instruction (32 Bit)
Format
ST 2,N2
ST 11,106(8,10)
The specific syntax is
ST source register,displacement(index register,base register)
Where the displacement, index register and base register values will be determined automatically by the assembler if the USING pseudo-instruction has been used, and the target address label used is within 4096 bytes of the value of some base register.
Opcode
50 S
Availability
The ST instruction is available on all models of the 360, 370 and z/System.
Operation
The ST instruction takes the 32-bit integer value contained in the source register specified by the first argument and stores that value in the memory address specified by the second argument (the target address).
The target address is constructed by taking the value stored in the base register, adding to it the value of the 12-bit offset (called a displacement) address, then adding the value stored in the index register (unless the index register is 0, then its contents are not added) to the base and displacement address, to determine the target address. In the above example of the address 106(8,10), the address value stored in register 10 is added to the displacement address 106 (hexadecimal 6A), then the address value stored in register 8 is added to this to create the target address. Had register 0 been used instead of 8, the value stored in register 0 would not have been used.
The target address must be aligned to a word boundary (i.e. 4 bytes). The Condition Code field in the Program Status Word is not changed.
Exceptions and Faults
The target address must be within the range of valid memory or an operation exception occurs.
The target address must be aligned to a word boundary or an address exception occurs.
The storage key for the target address must be the same as the current process (or the process must be privileged with a key of zero) or a memory protect violate exception occurs.
SSM STAP 4F CVB 51 LAE