14 nm process

The 12 nm, 14 nm, and 16 nm fabrication nodes are discussed here. February 2012 MOSFET technology node The 14 nanometer process is a marketing term for the MOSFET technology node that is the successor to the 22nm (or 20nm) node. The 14nm was so named by the International Technology Roadmap for Semiconductors (ITRS). Until about 2011, the node following 22nm was expected to be 16nm. All 14nm nodes use FinFET (fin field-effect transistor) technology, a type of multi-gate MOSFET technology that is a non-planar evolution of planar silicon CMOS technology. Since at least 1997, process nodes have been named purely on a marketing basis, and have no relation to the dimensions on the integrated circuit;https://www.eejournal.com/article/no-more-nanometers/ No More Nanometers – EEJournal July 23, 2020 neither gate length, metal pitch or gate pitch on a 14nm device is fourteen nanometers.https://www.design-reuse.com/articles/43316/a-brief-history-of-process-node-evolution.html A Brief History of Process Node Evolution Shukla Priyank design-reuse.com 2019-07-09https://www.extremetech.com/computing/184946-14nm-7nm-5nm-how-low-can-cmos-go-it-depends-if-you-ask-the-engineers-or-the-economists 14nm, 7nm, 5nm: How low can CMOS go? It depends if you ask the engineers or the economists... Hruska Joel ExtremeTech June 23, 2014 https://wccftech.com/intel-losing-process-lead-analysis-7nm-2022/ Exclusive: Is Intel Really Starting To Lose Its Process Lead? 7nm Node Slated For Release in 2022 wccftech.com 2016-09-10 For example, TSMC and Samsung's 10 nm processes are somewhere between Intel's 14 nm and 10 nm processes in transistor density, and TSMC's 7 nm processes are dimensionally similar to Intel's 10 nm process.https://www.eejournal.com/article/life-at-10nm-or-is-it-7nm-and-3nm/ Life at 10nm. (Or is it 7nm?) And 3nm – Views on Advanced Silicon Platforms eejournal.com 2018-03-12 Samsung Electronics taped out a 14 nm chip in 2014, before manufacturing 10 nm class NAND flash chips in 2013.February 2024April 2020 The sentence implies 2014 is before 2013. The same year, SK Hynix began mass-production of 16nm NAND flash, and TSMC began 16nm FinFET production. The following year, Intel began shipping 14nm scale devices to consumers.February 2024 History Background The resolutions of a 14 nm device are difficult to achieve in a polymeric resist, even with electron beam lithography. In addition, the chemical effects of ionizing radiation also limit reliable resolution to about 30 nm, which is also achievable using current state-of-the-art immersion lithography. Hardmask materials and multiple patterning are required. A more significant limitation comes from plasma damage to low-k materials. The extent of damage is typically 20 nm thick,O. Richard Sidewall damage in silica-based low-k material induced by different patterning plasma processes studied by energy filtered and analytical scanning TEM Microelectronic Engineering 84 3 517–523 2007 10.1016/j.mee.2006.10.058 etal but can also go up to about 100 nm.T. Gross Detection of nanoscale etch and ash damage to nanoporous methyl silsesquioxane using electrostatic force microscopy Microelectronic Engineering 85 2 401–407 2008 10.1016/j.mee.2007.07.014 etal The damage sensitivity is expected to get worse as the low-k materials become more porous. For comparison, the atomic radius of an unconstrained silicon is 0.11 nm. Thus about 90 Si atoms would span the channel length, leading to substantial leakage. Tela Innovations and Sequoia Design Systems developed a methodology allowing double exposure for the 16 nm/14 nm node circa 2010.V. Axelrad Michael L Rieger Joerg Thiele 16nm with 193nm immersion lithography and double exposure Proc. SPIE Design for Manufacturability through Design-Process Integration IV 7641 764109 2010 10.1117/12.846677 2010SPIE.7641E..09A 56158128 etal Samsung and Synopsys had also, at that time, begun implementing double patterning in 22 nm and 16 nm design flows.M-S. Noh Mircea V Dusa Will Conley Implementing and validating double patterning in 22-nm to 16-nm product design and patterning flows Proc. SPIE Optical Microlithography XXIII 7640 76400S 2010 10.1117/12.848194 2010SPIE.7640E..0SN 120545900 etal Mentor Graphics reported taping out 16 nm test chips in 2010.http://www.eetimes.com/electronics-news/4206398/Mentor-moves-tools-toward-16-nanometer August 23, 2010 Mentor moves tools toward 16-nanometer EETimesFebruary 2024 On January 17, 2011, IBM announced that they were teaming up with ARM to develop 14 nm chip processing technology.http://www-03.ibm.com/press/us/en/pressrelease/33405.wss https://web.archive.org/web/20110121214100/http://www-03.ibm.com/press/us/en/pressrelease/33405.wss dead January 21, 2011 IBM Press release January 17, 2011 IBM and ARM to Collaborate on Advanced Semiconductor Technology for Mobile Electronics February 2024 On February 18, 2011, Intel announced that it would construct a new $5 billion semiconductor fabrication plant in Arizona, designed to manufacture chips using the 14 nm manufacturing processes and leading-edge 300 mm wafers.http://www.eetimes.com/electronics-news/4213295/Intel-to-build-new-Arizona-fab- Intel to build fab for 14-nm chips EE Times February 22, 2011 February 2, 2013 https://web.archive.org/web/20130202082819/http://www.eetimes.com/electronics-news/4213295/Intel-to-build-new-Arizona-fab- deadUpdate: Intel to build fab for 14-nm chips The new fabrication plant was to be named Fab 42, and construction was meant to start in the middle of 2011. Intel billed the new facility as "the most advanced, high-volume manufacturing facility in the world," and said it would come on line in 2013. Intel since decided to postpone opening this facility and instead upgrade its existing facilities to support 14-nm chips.https://www.reuters.com/article/us-intel-arizona-idUSBREA0D1F920140114 Intel shelves cutting-edge Arizona chip factory Reuters January 14, 2014 February 2024 On May 17, 2011, Intel announced a roadmap for 2014 that included 14 nm transistors for their Xeon, Core, and Atom product lines.http://www.anandtech.com/show/4345/intels-2011-investor-meeting-intels-architecture-group-14nm-airmont-atom-in-2014 https://web.archive.org/web/20110520025902/http://www.anandtech.com/show/4345/intels-2011-investor-meeting-intels-architecture-group-14nm-airmont-atom-in-2014 dead May 20, 2011 Implementing and validating double patterning in 22-nm to 16-nm product design and patterning flows AnandTech May 17, 2011 February 2024 Technology demos In the late 1990s, Hisamoto's Japanese team from Hitachi Central Research Laboratory began collaborating with an international team of researchers on further developing FinFET technology, including TSMC's Chenming Hu and various UC Berkeley researchers. In 1998, the team successfully fabricated devices down to a 17nm process. They later developed a 15nm FinFET process in 2001.Tsu-Jae King Liu Tsu-Jae King Liu FinFET: History, Fundamentals and Future https://people.eecs.berkeley.edu/~tking/presentations/KingLiu_2012VLSI-Tshortcourse University of California, Berkeley Symposium on VLSI Technology Short Course June 11, 2012 9 July 2019 In 2002, an international team of researchers at UC Berkeley, including Shibly Ahmed (Bangladeshi), Scott Bell, Cyrus Tabery (Iranian), Jeffrey Bokor, David Kyser, Chenming Hu (Taiwan Semiconductor Manufacturing Company), and Tsu-Jae King Liu, demonstrated FinFET devices down to 10 nm gate length.Ahmed Shibly Bell Scott Tabery Cyrus Bokor Jeffrey Kyser David Hu Chenming Liu Tsu-Jae King Yu Bin Chang Leland Digest. International Electron Devices Meeting FinFET scaling to 10 nm gate length December 2002 251–254 10.1109/IEDM.2002.1175825 https://www.eecs.wsu.edu/~osman/EE597/FINFET/finfet4.pdf 0-7803-7462-2 7106946 December 10, 2019 May 27, 2020 https://web.archive.org/web/20200527205136/https://www.eecs.wsu.edu/~osman/EE597/FINFET/finfet4.pdf dead In 2005, Toshiba demonstrated a 15 nm FinFET process, with a 15 nm gate length and 10 nm fin width, using a sidewall spacer process.A Kaneko A Yagashita K Yahashi T Kubota etal Sidewall transfer process and selective gate sidewall spacer formation technology for sub-15nm FinFET with elevated source/drain extension IEEE International Electron Devices Meeting (IEDM 2005) 844–847 2005 10.1109/IEDM.2005.1609488 It had erstwhile been suggested in 2003 that for the 16 nm node, a logic transistor would have a gate length of about 5 nm.https://www.zdnet.com/article/intel-scientists-find-wall-for-moores-law/ Intel scientists find wall for Moore's Law ZDNet December 1, 2003February 2024 In December 2007, Toshiba demonstrated a prototype memory unit that used 15-nanometre thin lines.http://www.theinquirer.net/gb/inquirer/news/2007/12/13/nanometre-memory-tested https://web.archive.org/web/20071213194617/http://www.theinquirer.net/gb/inquirer/news/2007/12/13/nanometre-memory-tested unfit December 13, 2007 15 Nanometre Memory Tested The Inquirer In December 2009, National Nano Device Laboratories, owned by the Taiwanese government, produced a 16 nm SRAM chip.http://www.taiwantoday.tw/ct.asp?xitem=87144&CtNode=416 16nm SRAM produced – Taiwan Today taiwantoday.tw December 16, 2009 https://web.archive.org/web/20160320040841/http://www.taiwantoday.tw/ct.asp?xitem=87144&CtNode=416 March 20, 2016 dead mdy-allFebruary 2024 In September 2011, Hynix announced the development of 15 nm NAND cells.Hübler Arved 2011 Printed Paper Photovoltaic Cells Advanced Energy Materials 1 6 1018–1022 10.1002/aenm.201100394 2011AdEnM...1.1018H 98247321 etalFebruary 2024 In December 2012, Samsung Electronics taped out a 14 nm chip.https://www.engadget.com/2012/12/21/samsung-first-14nm-finfet-test-chip-/ Samsung reveals its first 14nm FinFET test chip Engadget December 21, 2012 June 12, 2018 August 23, 2017 https://web.archive.org/web/20180612141228/https://www.engadget.com/2012/12/21/samsung-first-14nm-finfet-test-chip-/ dead February 2024 In September 2013, Intel demonstrated an Ultrabook laptop that used a 14 nm Broadwell CPU, and Intel CEO Brian Krzanich said, "[CPU] will be shipping by the end of this year."https://www.theregister.co.uk/2013/09/10/intel_reveals_14nm_pc_declares_moores_law_alive_and_well/ Intel reveals 14nm PC, declares Moore's Law 'alive and well' The Register September 10, 2013 However, as of February 2014, shipment had at time erstwhile been delayed further until Q4 2014. http://www.digitimes.com/news/a20140212PD209.html?mod=2 Intel postpones Broadwell availability to 4Q14 February 12, 2014 Digitimes.com 2014-02-13February 2024 In August 2014, Intel announced details of the 14 nm microarchitecture for its upcoming Core M processors, the first product to be manufactured on Intel's 14 nm manufacturing process. The first systems based on the Core M processor were to become available in Q4 2014 — according to the press release. "Intel's 14 nanometer technology uses second-generation tri-gate transistors to deliver industry-leading performance, power, density and cost per transistor," said Mark Bohr, Intel senior fellow, Technology and Manufacturing Group, and director, Process Architecture and Integration.http://newsroom.intel.com/community/intel_newsroom/blog/2014/08/11/intel-discloses-newest-microarchitecture-and-14-nanometer-manufacturing-process-technical-details Intel Discloses Newest Microarchitecture and 14 Nanometer Manufacturing Process Technical Details Intel August 11, 2014 August 26, 2014 August 12, 2014 https://web.archive.org/web/20140826120102/http://newsroom.intel.com/community/intel_newsroom/blog/2014/08/11/intel-discloses-newest-microarchitecture-and-14-nanometer-manufacturing-process-technical-details dead February 2024 In 2018 a shortage of 14 nm fab capacity was announced by Intel.https://www.extremetech.com/computing/276481-intel-faces-14nm-shortage-as-cpu-prices-rise Intel Faces 14nm Shortage As CPU Prices Rise - ExtremeTech www.extremetech.com September 6, 2018 February 2024 Shipping devices In 2013, SK Hynix began mass-production of 16nm NAND flash,History: 2010s https://www.skhynix.com/eng/about/history2010.jsp SK Hynix 8 July 2019 May 17, 2021 https://web.archive.org/web/20210517040328/https://www.skhynix.com/eng/about/history2010.jsp dead TSMC began 16nm FinFET production,16/12nm Technology https://www.tsmc.com/english/dedicatedFoundry/technology/16nm.htm TSMC 30 June 2019 and Samsung began "10nm class" NAND flash production.Samsung Mass Producing 128Gb 3-bit MLC NAND Flash https://www.tomshardware.co.uk/NAND-128Gb-Mass-Production-3-bit-MLC,news-43458.html 21 June 2019 Tom's Hardware 11 April 2013 June 21, 2019 https://web.archive.org/web/20190621175628/https://www.tomshardware.co.uk/NAND-128Gb-Mass-Production-3-bit-MLC,news-43458.html dead On September 5, 2014, Intel launched the first three Broadwell-based processors that belonged to the low-TDP Core M family: Core M-5Y10, Core M-5Y10a, and Core M-5Y70. http://www.cpu-world.com/news_2014/2014090701_Intel_launches_first_Broadwell_processors.html Intel launches first Broadwell processors Anthony Shvets CPU World 7 September 2014 18 March 2015February 2024 In February 2015, Samsung announced that their flagship smartphones, the Galaxy S6 and S6 Edge, would feature 14 nm Exynos systems on chip (SoCs).https://news.samsung.com/global/samsung-announces-mass-production-of-industrys-first-14nm-finfet-mobile-application-processor Samsung Announces Mass Production of Industry's First 14nm FinFET Mobile Application Processor news.samsung.comFebruary 2024 On March 9, 2015, Apple Inc. released the Early 2015 MacBook and MacBook Pro, which utilized 14 nm Intel processors. Of note is the i7-5557U, which has Intel Iris Graphics 6100 and two cores running at 3.1 GHz, using only 28 watts. http://www.everymac.com/systems/apple/macbook_pro/specs/macbook-pro-core-i7-3.1-13-early-2015-retina-display-specs.html Apple MacBook Pro "Core i7" 3.1 13" Early 2015 Specs EveryMac.com 2015 18 March 2015 http://www.cpu-world.com/CPUs/Core_i7/Intel-Core%20i7-5557U%20Mobile%20processor.html Intel Core i7-5557U specifications CPU World 2015 18 March 2015February 2024 On September 25, 2015, Apple Inc. released the iPhone 6S & 6S Plus, which were erstwhile equipped with "desktop-class" A9 chips https://www.theverge.com/2015/9/9/9295923/apple-a9x-ipad-pro-chip Apple's new A9 and A9X processors promise 'desktop-class performance' Vincent James The Verge 9 September 2015 27 August 2017 that are fabricated in both 14 nm by Samsung and 16 nm by TSMC (Taiwan Semiconductor Manufacturing Company).February 2024 In May 2016, Nvidia released its GeForce 10 series GPUs based on the Pascal architecture, which incorporates TSMC's 16 nm FinFET technology and Samsung's 14 nm FinFET technology. Talks of foundry partnership between NVIDIA and Samsung (14nm) didn't succeed, and the GPU maker decided to revert to TSMC's 16nm process. http://www.techpowerup.com/216080/nvidia-pascal-gpus-to-be-built-on-16-nm-tsmc-finfet-node.html August 25, 2015 Samsung to Optical-Shrink NVIDIA "Pascal" to 14 nm https://www.techpowerup.com/224976/samsung-to-optical-shrink-nvidia-pascal-to-14-nm.html August 13, 2016February 2024 In June 2016, AMD released its Radeon RX 400 GPUs based on the Polaris architecture, which incorporated 14 nm FinFET technology from Samsung. The technology had at that time been licensed to GlobalFoundries for dual sourcing.Smith Ryan AMD Announces RX 470 & RX 460 Specifications; Shipping in Early August http://www.anandtech.com/show/10530/amd-announces-radeon-rx-470-rx-460-specifications-shipping-in-early-august https://web.archive.org/web/20160730164132/http://www.anandtech.com/show/10530/amd-announces-radeon-rx-470-rx-460-specifications-shipping-in-early-august dead July 30, 2016 29 July 2016 Anandtech 28 July 2016February 2024 On August 2, 2016, Microsoft released the Xbox One S, which utilized 16 nm by TSMC. February 2024 On March 2, 2017, AMD released its Ryzen CPUs based on the Zen architecture, incorporating 14 nm FinFET technology from Samsung which had erstwhile been licensed to GlobalFoundries for GlobalFoundries to build.http://www.extremetech.com/computing/217664-globalfoundries-announces-14nm-validation-with-amd-silicon GlobalFoundries announces 14nm validation with AMD Zen silicon ExtremeTech November 6, 2015 February 2024 The NEC SX-Aurora TSUBASA processor, introduced in October 2017,https://www.nec.com/en/press/201710/global_20171025_01.html NEC releases new high-end HPC product line, SX-Aurora TSUBASA NEC 2018-03-21 en-US used a 16nm FinFET process from TSMC and was designed for use with NEC SX supercomputers.Cutress Ian Hot Chips 2018: NEC Vector Processor Live Blog https://www.anandtech.com/show/13259/hot-chips-2018-nec-vector-processor-live-blog https://web.archive.org/web/20180822041859/https://www.anandtech.com/show/13259/hot-chips-2018-nec-vector-processor-live-blog dead August 22, 2018 15 July 2019 AnandTech August 21, 2018February 2024 On July 22, 2018, GlobalFoundries announced their 12 nm Leading-Performance (12LP) process, based on a licensed 14LP process from Samsung.https://fuse.wikichip.org/news/1497/vlsi-2018-globalfoundries-12nm-leading-performance-12lp/ VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP Schor David 2018-07-22 WikiChip Fuse en-US 2019-05-31 April 7, 2019 https://web.archive.org/web/20190407104112/https://fuse.wikichip.org/news/1497/vlsi-2018-globalfoundries-12nm-leading-performance-12lp/ deadFebruary 2024 In September 2018, Nvidia released GPUs based on their Turing (microarchitecture), which were made on TSMC's 12 nm process and had a transistor density of 24.67 million transistors per square millimeter.https://wccftech.com/nvidia-geforce-rtx-30-series-ampere-graphics-cards-deep-dive/ NVIDIA GeForce RTX 30 Series & Ampere GPUs Further Detailed – GA102/GA104 GPU Specs & RTX 3090, RTX 3080, RTX 3070 Performance & Features Revealed September 4, 2020February 2024 14 nm process nodes ITRS Logic DeviceGround Rules (2015) SamsungSecond-sourced to GlobalFoundries. TSMChttps://www.tsmc.com/english/dedicatedFoundry/technology/logic/l_16_12nm 16/12nm Technology TSMC November 12, 2022 Intel GlobalFoundriesBased on Samsung's 14nm process. SMIC Process name 16/14 nm 14LPE 14LPP 11LPP 16FF FinFET(16 nm) 16FF+ FinFET Plus(16 nm) 16FFC FinFET Compact(16 nm) 12FFC FinFET Compact(12 nm) 14 nm 14 nm + 14 nm ++ 14LPP Low Power Plushttps://www.globalfoundries.com/sites/default/files/product-briefs/product-brief-14lpp.pdf PB14LPP-1.0 dead https://web.archive.org/web/20170905171527/https://www.globalfoundries.com/sites/default/files/product-briefs/product-brief-14lpp.pdf September 5, 2017 GlobalFoundries November 28, 2022(14 nm) 12LP Leading-Performancehttps://www.globalfoundries.com/sites/default/files/product-briefs/pb-12lp-11-web.pdf PB12LP-1.1 dead https://web.archive.org/web/20181227045657/https://www.globalfoundries.com/sites/default/files/product-briefs/pb-12lp-11-web.pdf December 27, 2018 GlobalFoundries November 28, 2022https://fuse.wikichip.org/news/1497/vlsi-2018-globalfoundries-12nm-leading-performance-12lp/ VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP David Schor July 22, 2018 WikiChip Fuse May 31, 2019 April 7, 2019 https://web.archive.org/web/20190407104112/https://fuse.wikichip.org/news/1497/vlsi-2018-globalfoundries-12nm-leading-performance-12lp/ dead(12 nm) 12LP+ Leading-Performance-plus14 nm 12 nm  Transistor density (MTr/mm2) 32.94 54.38 28.88https://fuse.wikichip.org/news/2261/tsmc-announces-6-nanometer-process/ TSMC Announces 6-Nanometer Process Schor David April 16, 2019 WikiChip Fuse en-US May 31, 2019 November 15, 2022 https://web.archive.org/web/20221115172838/https://fuse.wikichip.org/news/2261/tsmc-announces-6-nanometer-process/ dead 33.8https://www.techcenturion.com/7nm-10nm-14nm-fabrication 7nm vs 10nm vs 14nm: Fabrication Process – Tech Centurion November 26, 2019 37.5https://spectrum.ieee.org/intel-now-packs-100-million-transistors-in-each-square-millimeter Intel Now Packs 100 Million Transistors in Each Square Millimeter IEEE Spectrum: Technology, Engineering, and Science News March 30, 2017 en 2018-11-14Intel uses this formula:https://newsroom.intel.com/editorials/lets-clear-up-node-naming-mess/ Let's Clear Up the Node Naming Mess Bohr Mark March 28, 2017 Intel Newsroom December 6, 2018 # 44.67https://www.anandtech.com/show/13405/intel-10nm-cannon-lake-and-core-i3-8121u-deep-dive-review/3 https://web.archive.org/web/20190130194809/https://www.anandtech.com/show/13405/intel-10nm-cannon-lake-and-core-i3-8121u-deep-dive-review/3 dead January 30, 2019 Intel's 10nm Cannon Lake and Core i3-8121U Deep Dive Review 30.59 36.71 30SMIC-14nm https://www.smics.com/en/site/technology_advanced_14 SIMC December 21, 2021 July 4, 2022 https://web.archive.org/web/20220704222432/https://www.smics.com/en/site/technology_advanced_14 dead Transistor gate pitch (nm) 70 78 88 70 8484 90 Interconnect pitch (nm) 56 67 70 52 colspan="2" Transistor fin pitch (nm) 42 49 45 42 48 51 Transistor fin width (nm) 8 8 colspan="4" 8 colspan="2" Transistor fin height (nm) 42 ~38 37 42 colspan="2" Production year 2015 2014 Q4Frumusanu Andrei The Samsung Exynos 7420 Deep Dive – Inside A Modern 14nm SoC https://www.anandtech.com/show/9330/exynos-7420-deep-dive https://archive.today/20150629104834/http://www.anandtech.com/show/9330/exynos-7420-deep-dive dead June 29, 2015 2024-08-01 www.anandtech.com 2016 Q1Frumusanu Andrei Samsung Announces Second-Gen 14nm Low Power Plus (14LPP) Process Now In Mass Production https://www.anandtech.com/show/9959/samsung-announces-14lpp-mass-production https://web.archive.org/web/20160116015321/http://www.anandtech.com/show/9959/samsung-announces-14lpp-mass-production dead January 16, 2016 2024-08-01 www.anandtech.com2018 H2Shilov Anton Samsung Details 11LPP Process Technology: 10 nm BEOL Meets 14 nm Elements https://www.anandtech.com/show/11877/samsung-details-11lpp-process-technology-10-nm-beol-meets-14-nm-elements https://web.archive.org/web/20170929211723/https://www.anandtech.com/show/11877/samsung-details-11lpp-process-technology-10-nm-beol-meets-14-nm-elements dead September 29, 2017 2024-08-01 www.anandtech.com 2013 Q4 risk production2014 production 2015 Q3 2016 Q2 2017 2014 Q3Smith Ryan Intel's 14nm Technology in Detail https://www.anandtech.com/show/8367/intels-14nm-technology-in-detail https://web.archive.org/web/20140811235410/http://anandtech.com/show/8367/intels-14nm-technology-in-detail dead August 11, 2014 2024-08-01 www.anandtech.com 2016 H2Cutress Ian Intel Announces 7th Gen Kaby Lake: 14nm PLUS, Six Notebook SKUs, Desktop coming in January https://www.anandtech.com/show/10610/intel-announces-7th-gen-kaby-lake-14nm-plus-six-notebook-skus-desktop-coming-in-january https://web.archive.org/web/20160831144921/http://www.anandtech.com/show/10610/intel-announces-7th-gen-kaby-lake-14nm-plus-six-notebook-skus-desktop-coming-in-january dead August 31, 2016 2024-08-01 www.anandtech.com 2017Howse Brett Intel Announces 8th Generation Core "Coffee Lake" Desktop Processors: Six-core i7, Four-core i3, and Z370 Motherboards https://www.anandtech.com/show/11869/intel-announces-8th-generation-coffee-lake-hex-core-desktop-processors https://web.archive.org/web/20170925092310/https://www.anandtech.com/show/11869/intel-announces-8th-generation-coffee-lake-hex-core-desktop-processors dead September 25, 2017 2024-08-01 www.anandtech.com 2016 2018 2020 Q3GLOBALFOUNDRIES 12LP+ FinFET Solution Ready for Production https://www.hpcwire.com/off-the-wire/globalfoundries-12lp-finfet-solution-ready-for-production/ 2024-08-01 HPCwire en-US 2019 Q3 risk productionShilov Anton SMIC: 14nm FinFET in Risk Production; China's First FinFET Line To Contribute Revenue by Late 2019 https://www.anandtech.com/show/14744/smic-14nm-finfet-in-risk-production-to-contribute-revenue-by-late-2019 https://web.archive.org/web/20190816212616/https://www.anandtech.com/show/14744/smic-14nm-finfet-in-risk-production-to-contribute-revenue-by-late-2019 2019-08-16 2025-08-162019 Q4 productionShilov Anton SMIC Begins Volume Production of 14 nm FinFET Chips: China's First FinFET Line https://www.anandtech.com/show/15105/smic-begins-volume-production-of-14-nm-finfet-chips-chinas-first-finfet-line https://web.archive.org/web/20191114204126/https://www.anandtech.com/show/15105/smic-begins-volume-production-of-14-nm-finfet-chips-chinas-first-finfet-line 2019-11-14 2025-08-16 2019 Q4 risk productionDIGITIMES 2019-11-14 SMIC to move 12nm FinFET process to risk production by year-end 2019 https://medium.com/digitimes/smic-to-move-12nm-finfet-process-to-risk-production-by-year-end-2019-ed33cefe7ff8 2025-08-16 DIGITIMES en2020 Q4 productionSMIC starts small-scale mass production of the 12nm process. Has domestic wafer foundry technology caught up with Intel? https://news.futunn.com/en/post/8135966/smic-starts-small-scale-mass-production-of-the-12nm-process 2025-08-16 news.futunn.com en-us Lower numbers are better, except for transistor density, in which case the opposite is true.https://www.britannica.com/technology/computer-chip#ref1036975 Nanotechnology is expected to make transistors even smaller and chips correspondingly more powerful December 22, 2017 Encyclopædia Britannica March 7, 2018 Transistor gate pitch is also referred to as CPP (contacted poly pitch), and interconnect pitch is also referred to as MMP (minimum metal pitch).http://www.intel.com/content/dam/www/public/us/en/documents/technology-briefs/bohr-14nm-idf-2014-brief.pdf Intel 14nm Process Technologyhttp://www.electronics-eetimes.com/news/samsung%E2%80%99s-14-nm-lpe-finfet-transistors/page/0/3 Samsung's 14 nm LPE FinFET transistors January 20, 2016 Electronics EETimes February 17, 2017 en February 18, 2017 https://web.archive.org/web/20170218144925/http://www.electronics-eetimes.com/news/samsung%E2%80%99s-14-nm-lpe-finfet-transistors/page/0/3 deadhttps://en.wikichip.org/wiki/14_nm_lithography_process 14 nm lithography process – WikiChip en.wikichip.org en February 17, 2017 July 1, 2019 https://web.archive.org/web/20190701083339/https://en.wikichip.org/wiki/14_nm_lithography_process deadhttps://en.wikichip.org/wiki/16_nm_lithography_process 16 nm lithography process – WikiChip en.wikichip.org en February 17, 2017 June 6, 2017 https://web.archive.org/web/20170606201625/https://en.wikichip.org/wiki/16_nm_lithography_process deadhttps://www.semiconductors.org/clientuploads/Research_Technology/ITRS/2015/0_2015%20ITRS%202.0%20Executive%20Report%20(1).pdf International Technology Roadmap for Semiconductors 2.0 2015 Edition Executive Report April 6, 2017 https://web.archive.org/web/20161002215308/http://www.semiconductors.org/clientuploads/Research_Technology/ITRS/2015/0_2015%20ITRS%202.0%20Executive%20Report%20%281%29.pdf October 2, 2016 dead mdy-all https://www.anandtech.com/show/15105/smic-begins-volume-production-of-14-nm-finfet-chips-chinas-first-finfet-line SMIC Begins Volume Production of 14 nm FinFET Chips: China's First FinFET Line Shilov Anton AnandTech November 16, 2019 November 15, 2019 https://web.archive.org/web/20191115160920/https://www.anandtech.com/show/15105/smic-begins-volume-production-of-14-nm-finfet-chips-chinas-first-finfet-line dead References 30em 22 nm 10 nm MOSFET manufacturing processes *00014